Hands-on projects from graduate coursework

1

Project 1 of 5. ECEN 828 Power Electronics, Prof. Jun Wang. Term project, team of two.

A dual-output flyback converter, from the magnetics up

Design, PLECS simulation, transformer construction, PCB assembly, and bench qualification. December 2021.

The problem

A flyback converter is a simple switch-mode power supply: one switch, one coupled inductor, one diode per output. The specification was an 18 to 24 V dc input converted to a ±15 V dual output within 4% tolerance, with the converter kept in discontinuous conduction and an efficiency above 80%. We loaded each output with 50 Ω. The converter followed the reference board design and its bill of materials, built around a Texas Instruments LM2587T-ADJ controller with an integrated 65 V, 5 A switch, a fixed 100 kHz oscillator, and current-mode control. The coupled inductor was ours to design, build, measure, and make work.

What we built

This was a joint project with Kashfia Tajmin Nabila; we did the calculations, the simulations, and the lab work together rather than dividing them up. From the 65 V switch rating and the 40 V rating of the output diodes we bounded the turns ratio to between 0.96 and 2.00 and chose 1.33:1:1, close to one of the two ratios Dr. Wang recommended. With 50 Ω loads, 100 kHz switching, and a design duty cycle of 0.5 against the controller's 0.6 limit, the discontinuous conduction condition put the magnetizing inductance below 35.33 µH, and we started the design at 13 µH. A Level 1 PLECS model with 0.2 µH of leakage inductance gave 15.04 V on each output at both 18 V and 24 V input, with efficiency above 80% and a duty cycle near 0.2. A Level 2 model then added the core, the air gap, and the leakage of the transformer we intended to build; at 24 V input it ran at a duty cycle of 0.256 with a peak flux density of 0.21 T, below the 0.32 T saturation limit of the core.

Then the part itself. The core was a Ferroxcube EE 25/13/7 in 3C94 ferrite. With a peak magnetizing current of 5.23 A from the simulation and a design flux density of 0.25 T, the air gap came out at 0.137 mm and the primary at about five turns; we set the gap to 0.2 mm with two layers of Kapton tape and wound the transformer with Litz wire. Three transformers were needed. The first, wound 6:4:4, measured 11.13 µH of primary inductance and 0.57 µH of leakage; its inductance was too small, and when the board was powered the bench supply went into constant-current mode and the transistor heated. The second, 8:6:6 with interleaved windings, raised the primary inductance to 12.83 µH but improved the leakage by only 0.06 µH, and its board gave only 2.6 V, then 3 V with the potentiometer; the cause was a 1.6 kΩ resistor fitted at R2 in place of 18 kΩ, and the board was damaged removing it. The third, 8:6:6 without interleaving, measured 12.22 µH of primary inductance and 0.48 µH of leakage with the secondaries shorted on an LCR meter, a coupling factor of 0.98, and on a fresh board it ran as designed.

On the bench

Qualification meant running the converter into 50 Ω per channel, two 100 Ω resistors in parallel, and holding both outputs within 4% of 15 V for three minutes at each of 18 V and 24 V input, with all signals read as RMS values on the oscilloscope for the efficiency calculation. At 18 V input the converter drew 0.64 A and delivered 15.0 V at 0.330 A on the positive output and 14.8 V at 0.324 A on the negative, an efficiency of 84.6%. At 24 V it drew 0.48 A and delivered 15.0 V at 0.331 A and 14.9 V at 0.324 A, an efficiency of 85.0%. Both outputs stayed within tolerance for the full six minutes of testing. The switching transistor was hot after the 18 V run, so we let the board cool before the 24 V test, and for the same reason we did not push the output above 15 V with the potentiometer, which allows adjustment from about 10 V to more than 15 V. The improvement we proposed is a transformer with lower leakage inductance, for higher efficiency.

Design targets and test conditions

Property	Value
Input voltage	18 to 24 V dc
Output	±15 V, within 4%
Load	50 Ω per channel
Conduction mode	Discontinuous, magnetizing inductance below 35.33 µH
Switching frequency	100 kHz, fixed by the LM2587
Duty cycle limit	Below 0.6
Efficiency	Above 80%

Measured on the bench, three minutes at each input voltage

Input	Result
18 V, drawing 0.64 A	15.0 V at 0.330 A and 14.8 V at 0.324 A out, 84.6% efficiency
24 V, drawing 0.48 A	15.0 V at 0.331 A and 14.9 V at 0.324 A out, 85.0% efficiency

Mathematical background

• The boundary between continuous and discontinuous conduction, K < K_crit(D), used to bound the magnetizing inductance
• Flyback transformer design: turns ratio from the switch and diode voltage ratings, air gap and turn count from peak magnetizing current and flux density
• Coupling factor and leakage inductance: with k = 0.98, leakage is about 4% of the primary inductance
• Litz wire and skin depth at 100 kHz

2

Project 2 of 5. ECEN 898 Modeling and Control of Three-Phase Power Converters, Prof. Jun Wang. Term project, team of three.

A permanent-magnet machine drive, emulated with two inverters and controlled on a DSP

dq-frame current control, phase-locked loop design, PLECS switching and processor-in-the-loop simulation, deployment on TI C2000 hardware. May 2022.

The problem

This platform replaces the machine in a drive test with a second inverter. VSI-2 is open-loop, feedforward controlled to synthesize the back-EMF of a permanent-magnet machine whose electrical frequency follows a 4 s cycle: 1 s at 60 Hz, a 1 s ramp down to 30 Hz, 1 s there, and a 1 s ramp back up, with the q-axis back-EMF proportional to frequency, 6 V at 60 Hz and 3 V at 30 Hz. VSI-1 is the drive under test. Its job is to hold the dq-frame phase current at a constant 1 A on the q axis and zero on the d axis, within ±0.05 A of switching-cycle-averaged variation, while the frequency, the back-EMF amplitude, and the unregulated capacitor voltage on the emulator side, anywhere from 10 to 20 V depending on the power VSI-2 absorbs, all move. The only signals that could be sensed were the three phase currents, the line-to-line back-EMF voltages, and that capacitor voltage.

What I did

The eleven problems in the assignment were split among the three of us, and the last three were shared. My share was the steady-state operating point of the drive, the phase-locked loop, and the switching simulation of the complete system. From the dq averaged model of VSI-1 and the RL link, with the capacitor open and the inductor shorted at steady state, I solved for the duty cycles that produce the commanded current at 60, 45, and 30 Hz: q-axis phase-to-neutral duties of 0.47, 0.395, and 0.32, a small negative d-axis duty, and dc-side currents of 0.47, 0.395, and 0.32 A. The phase-locked loop locks to the filtered line-to-line back-EMF so that the current controllers can work in a frame aligned with the emulated machine. I tuned its PI gains to kp = 7.5 and ki = 750, which with the 2 kHz RC sensing filter in the loop gave an 18.82 Hz bandwidth and 49.2 degrees of phase margin against the 45 degree requirement, and I offset the PLL angle by 121.72 degrees to cover the 120 degree shift of the line-to-line q voltage plus the 1.72 degree lag of the filter at 60 Hz. The current controllers were my teammates' design: PI gains of Kp = 1.3 and Ki = 130 with decoupling terms and a first-order Pade model of the half-period PWM delay, the one-period computation delay, and the filter delay, for a 1.2 kHz bandwidth at 45.5 degrees of phase margin. I then built the switching model of the whole system in PLECS: both inverters, third-harmonic-injection PWM for the machine emulator, minimum-loss center-aligned space-vector modulation for the drive written as a C-Script, the phase-locked loop, the current controllers, and the time-varying back-EMF. Once the startup transient settled, the switching-cycle averages of id and iq stayed inside the ±0.05 A band through the frequency cycle while the emulator-side capacitor voltage swung between about 14 and 20 V. The Bode plot of the RC filter and PLL came from a MATLAB script.

The last steps were shared across the team. We generated the controller code from the PLECS model with PLECS Coder, with the PI controllers and the PLL integrator converted to z-domain form, and checked it processor-in-the-loop on a TI LAUNCHXL-F28069M, where the dq currents again stayed within the band. We then set the sensor gains and offsets from the LAUNCHXL-F28069M and BOOSTXL-DRV8301 datasheets, shifted the PLL's initial angle to absorb a 2.7 ms delay between the back-EMF and drive phase voltages, and loaded the generated Code Composer Studio code onto two LAUNCHXL-F28069M boards. On the bench the processor controlling the drive locked to the emulated back-EMF frequency, and the measured phase current, averaged over a switching period, showed a 2 ms zero-crossing offset from the back-EMF at 60 Hz against 0.6 ms in simulation. One lesson stuck: a PLL initial angle constant that had not been converted to radians was only caught while debugging the hardware.

Operating point and control requirements

Quantity	Value
Drive dc bus	20 V
Emulator-side capacitor voltage	10 to 20 V, unregulated
Interface inductance and resistance per phase	3.44 mH, 3.4 Ω
Emulated back-EMF	30 to 60 Hz, 3 to 6 V on the q axis
Current command, dq frame	0 A, 1 A
Allowed current variation	±0.05 A, switching-cycle averaged
Switching and sampling frequency	12 kHz
Phase margin, PLL and current loops	At least 45°

Mathematical background

• Power-invariant Clarke and Park transformations, phase and line-to-line representations of three-phase variables
• Switching and averaged models of the voltage source inverter in stationary and rotating frames
• Small-signal loop design with the sensor filter, PWM, and computation delays folded into a first-order Pade approximation; discrete-time implementation of the compensators
• Phase-locked loop as a feedback loop: bandwidth against phase margin, and the effect of the sensing filters
• Carrier-based space-vector modulation and third-harmonic injection

3

Project 3 of 5. MECH 892 Special Topics in Robotics, Prof. Carl Nelson. Coding assignments and an individual literature review.

Parallel robot kinematics and the dynamics of a four-axis arm

Workspace and singularity analysis in code, configuration-space search, and a literature review on manipulator dynamics and control. 2023.

The course was a tour of robot architectures that are not serial arms: parallel and cable-driven mechanisms, compliant and soft actuators, origami-inspired structures, and the screw-theory language that describes all of them. The assignments were code. I derived the inverse kinematics of a 3-RPR planar parallel robot and swept the plane to map its reachable workspace, then found its singularity loci graphically and confirmed them by deriving the Jacobian and the conditions under which it loses rank. I sketched the configuration space of a planar RP arm around a workspace obstacle and wrote a search over it, and I built a heat map of a kinematic performance index across the workspace of a two-link arm. Earlier in the term I modeled McKibben pneumatic muscles from their ideal contraction and force-pressure relations to size an actuator against a spring load.

The term report was an individual literature review of the dynamics and control of a four-degree-of-freedom arm. Following the referenced work, I wrote out the Euler-Lagrange motion equations as a 4 by 4 coefficient matrix on the joint accelerations plus a second 4 by 4 matrix on the joint velocities, with coefficients that depend on mass, on the joint angles, and on sinusoidal functions of those angles. The plant is highly nonlinear and its four axes are strongly coupled, and the equations involve the first and second derivatives of the joint angles while the control goal is on the angles themselves, so there is no direct relation between the control variable and the motion equations. With the aim of driving all four joint-angle errors to zero, I compared three controllers from the literature: PID with manually tuned gain matrices, PID with gains tuned by a differential evolution algorithm, and a fuzzy-logic PID. In the responses to constant target angles reproduced from the cited papers, differential evolution tuning reduced the overshoot and settling time of the manually tuned PID, and the fuzzy-logic controller settled faster with lower overshoot than a two-degree-of-freedom PID at the first and third joints. The published work concentrates on holding the arm at a fixed position, while industrial tasks such as welding need trajectory following, so I proposed testing these controllers on time-varying trajectories and designing adaptive, robust, or sliding-mode control for the arm.

Mathematical background

• Forward and inverse kinematics of parallel mechanisms; workspace mapping through the inverse solution
• Jacobians, singularity classification, and manipulability and condition-number indices
• Configuration-space topology and obstacle representation
• Screw theory: twists, wrenches, pitch, and reciprocity
• Euler-Lagrange dynamics of a serial arm, and PID gain tuning by differential evolution and by fuzzy logic

4

Project 4 of 5. ECEN 935 Computational Intelligence, Prof. Wei Qiao, individual project; and CSCE 878 Introduction to Machine Learning, Prof. Stephen Scott, team project of four.

Learning systems, from backpropagation to swarm optimization

Particle swarm optimization of a wireless power link, six machine learning notebooks trained on a GPU cluster, and a proposed pipeline for Kaggle's whale and dolphin identification competition. 2021 and 2023.

Two courses, two years apart, covered the learning methods that later fed into my work on physics-informed observers. In Computational Intelligence the emphasis was on the algorithms themselves: multilayer networks trained by backpropagation, radial basis function and echo state networks, particle swarm optimization, evolutionary computation, fuzzy inference and fuzzy control, support vector machines, and reinforcement learning. My project applied particle swarm optimization to a hybrid inductive and capacitive wireless power transfer link, searching the design parameters to maximize link efficiency.

Introduction to Machine Learning was practice. Working in a small team on the university's Swan cluster, submitting Jupyter sessions as SLURM jobs and requesting GPU nodes when a model needed one, we completed six notebooks: exploratory analysis and decision trees on the Iris and heart-disease data sets, naive Bayes sentiment classification of IMDB reviews, a convolutional network for CIFAR-10 image classification, k-means and hierarchical clustering for image segmentation, hidden Markov models for sequence data, and random forests for heart-disease prediction. The course project was a team report, written by four of us under the team name AI Voyagers, proposing a solution to the Kaggle Happywhale competition: identifying individual whales and dolphins from the natural markings on their dorsal fins, tails, heads, and lateral views in photographs taken by researchers and institutions, a matching that is otherwise done by hand. After reviewing EfficientNet and ArcFace, we proposed resizing the images to 384x384 pixels for rapid validation and early model testing or 512x512 pixels to preserve finer features, normalizing pixel values to a 0 to 1 scale, and augmenting with vertical flips, brightness adjustments, and rotations. The model itself had four stages: a convolutional network regressing a bounding box around the animal, cropping and resizing to that box to remove background, a second convolutional network producing a compact embedding of the markings, and a fully connected network or support vector machine assigning the embedding to an individual. We planned to evaluate with accuracy, precision, recall, and F1-score under k-fold cross-validation and to check performance across species and populations for bias. The report stopped at the proposed design and contains no training results.

Mathematical background

• Gradient descent and backpropagation; radial basis and recurrent reservoir networks
• Bayes' rule and generative classifiers; maximum-margin classification and kernels
• Bias and variance, bagging, boosting, and random forests
• Expectation-maximization, and the forward-backward and Viterbi algorithms for hidden Markov models
• Population-based stochastic optimization: particle swarms and evolutionary algorithms
• Convolutional embeddings for individual identification, and k-fold cross-validation with accuracy, precision, recall, and F1-score

5

Project 5 of 5. ECEN 932 Advanced Power Electronics and Applications, Prof. Wei Qiao. Individual project.

A turn-off snubber for the switch in a photovoltaic battery charger

Snubber sizing and PLECS comparison of switching trajectories with and without the circuit. 2022.

A buck converter stepping a 240 V, 2 A photovoltaic string down to 48 V at 10 A for battery charging puts its MOSFET through a hard turn-off every cycle, with the voltage rising across the device while it is still carrying current. The project designed a polarized RC turn-off snubber to shape that trajectory: the capacitor takes over the current as the switch opens and limits the rate of voltage rise, the resistor discharges the capacitor when the switch closes again, and the diode makes the two paths asymmetric so the resistor stays out of the way during turn-off. I sized the snubber from the switching transition, built the converter in PLECS with and without it, and compared the switching waveforms and device stresses between the two.

Mathematical background

• Switching loci of a hard-switched transistor and the safe operating area
• RC snubber sizing from the turn-off current and the allowable rate of voltage rise
• Snubber loss and its trade against switching loss in the device